1. Field of the Invention
The present invention relates to a single-gate structure MOS-type electrically-rewritable non-volatile semiconductor memory, and a semiconductor device which can be used as an aging device which is turned on or off for a fixed time by storage of electric charge. Further, the present invention relates to a semiconductor system using a plurality of aging devices.
2. Description of the Related Art
An electrically-rewritable non-volatile semiconductor memory or an electrically erasable programmable read-only memory (EEPROM) generally has a double-gate structure having a floating gate and a control gate. Further, an aging device which is turned on or off for a fixed time by storage of electric charge also has a double-gate structure as in the EEPROM (see, e.g., Jpn. Pat. Appln. KOKAI No. 2004-94922 and Jpn. Pat. Appln. KOKAI No. 2005-310824).
On the other hand, a general IC has a single-gate structure having a control gate along without a floating gate, and also has a CMOS structure in which MOS transistors which are of different conductivity types are arranged in a complementary manner. Therefore, when embedding an EEPROM or an aging device in this type of IC, processes must be again formed in order to take trouble to manufacture a floating gate. Adding a process of forming a floating gate in order to embed an EEPROM or an aging device in an IC having a single-gate structure has a negative impact on cost and increases the production price of a device.
It is to be noted that the floating gate device can be regarded as a non-volatile memory or as an aging device. That is, an electric charge storage time realized by the floating gate becomes sufficiently long when the film thickness of the gate dielectric film is relatively large, and it can be used as a non-volatile memory. On the other hand, when the film thickness of the gate dielectric film is sufficiently small, an electric charge storage time realized by the floating gate becomes short, and hence it is possible to use the aging device.
As described above, the EEPROM or the aging device conventionally has a double-gate structure having a floating gate and a control gate, this becomes a bottleneck when embedding the EEPROM or the aging device in a general IC having the single-gate structure, and also becomes a factor of increasing the manufacturing cost of the device.
Accordingly, there has been demanded realization of a semiconductor device which can realize a non-volatile semiconductor memory, an aging device or the like with a single-gate structure and can contribute to a reduction in manufacturing cost when embedding in an IC having the single-gate structure.